Sunday, June 1, 2008


hi friends....
take a look at this microcontroller created by SUN MICROSYSTEMS.
A brief description of the basic hardware is given below:-
The main processor is an Atmel AT91RM9200 system on a chip (SOC) integrated
circuit. This unit incorporates the ARM920T ARM Thumb processor, based on the
v4T ARM architecture ARM9TDMI. The unit is packaged in a 256-pin ball grid array
package measuring 15mm square and does not require a heat sink. Power to the SOC
is 3.0V I/O voltage and 1.8V core voltage. In normal operation, it consumes
approximately 44mW core power. The ARM executes at 180MHz maximum internal
clock speed. The SOC contains a 64-way associative 16Kbyte data cache and a
16Kbyte instruction cache. The ARM9 uses a standard ARMv4 memory management
unit with 64-entry instruction translation lookaside buffer (TLB) and 64-entry data
TLB.
The external memory is controlled and accessed using the external bus interface
(EBI) module. The EBI contains a static memory controller. The eSPOT uses the static
memory controller for interfacing to Flash and pSRAM memories. The static memory
controller is configured to boot from Flash memory. The external memory databus is
a 16-bit data path with byte-wide and word-wide access. It uses twenty-one address
bits A1-A21 for word address with BS1 (UB) and BS0 (LB) byte and word address.
CS_RAM (CS1) enables pSRAM access and CS_ROM (CS0) accesses FLASH memory.
Memory is read when chip select and OE are asserted and written when chip select and
WE are asserted .The ARM9 is reset by the power controller as part of the power up and power down
sequence. Reset also disables the pSRAM during power change to prevent accidental
writes to memory.
The ARM920T has two clock sources that can be selected: BCLK and FCLK. The
selected clock source will be used to generate its global clock, GCLK. FCLK is
controlled from a software programmable phase lock loop (PLL). BCLK is controlled
from the 32.768KHz real time clock oscillator and is enabled on startup. Initialization
software then configures the phase lock loop and switches from BCLK to the faster
FCLK.
The SOC has a large collection of peripheral interface units. These include USB host
port, USB device port, Ethernet MAC, programmable I/O (PIO) controller, serial
peripheral interface (SPI) controller, TWI two-wire (I2C) interface, universal
synchronous/asynchronous serial interface (USART), serial synchronous controller
(I2S), multimedia card interface, three 16-bit counter/timers and system timers. The
unit also contains a real-time clock which is unused. The SOC also contains a
peripheral DMA controller (PDC) for fast direct access to USART, I2S, SPI and
memory channel.
The USB host port, one USART, and the multimedia card, TWI, I2S and Ethernet
MAC interfaces are not used directly in the current eSPOT implementation although
all signals are brought to the interboard connector. These peripherals could be used provided the appropriate physical interface and driver software. As this is a small
unit, not all devices can be utilized simultaneously.

for more information and resources visit http://www.sunspotworld.com
and don't forget to watch the videos featuring the applications of sunspot.
so think of some new applications and projects using this awesome SUNSPOT.

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